The present invention relates generally to a packet switch system, applied to a broadband switch, a cross-connect switch, a router etc, for forwarding (that includes switching, transmitting and transferring, unless specifically limited) a packet for managing a communication system together with a user packet.
The present invention relates more particularly to a packet insertion interval control system and a packet insertion interval control method for controlling an insertion interval of management-oriented packets required to be periodically forwarded in order to manage an operation and maintenance of the communication system, and of packets previously accumulated.
An ATM (Asynchronous Transfer Mode) communication system, which is applied to a broadband switch and serves as a packet switch system for forwarding a fixed-length packet (cells), is required to, when transferring cell data of a user cell and an OAM (Operation And Maintenance) cell that are defined as basic data in ATM communications, keep a desired communication quality by controlling a transfer sequence of the cell data.
It is recommended that the OAM cells such as an AIS (Alarm Indication Signal) cell, an RDI (Remote Defect Indication) cell and a CC (Continuity Check) cell be transferred at a given cycle (a cycle of 1 sec according to ITU-T I.610) in order to notify of fault information when a fault occurs and to monitor a normality of connections (a VPC connection and a VC connection multiplexed with the physical layer connection) at all times.
In the ATM communication system for processing a plurality of connections by multiplexing these connections, when generating the cells of each connection at the cycle of 1 sec, if the cells are consecutively inserted into all the connections accommodated therein, a traffic falls into a burst, and consequently the cells are discarded due to an overflow of the cells from a cell buffer (memory) in a cell multiplexer provided at a rear stage. There exists a method of troubleshooting this problem by increasing a buffer capacity, however, this method brings about a scale-up of the hardware. While on the other hand, if the buffer capacity is not increased, a probability of occurrence of discarding the cells increases, resulting in a decline of the communication quality.
Accordingly, the conventional ATM communication system is specially provided with an insertion interval management counter of alarm cells such as the AIS cells, whereby an insertion interval of the alarm cells generated per connection is kept over a predetermined interval, and the alarm cells are controlled so that the alarm cells inserted are not sent in burst (refer to, e.g., Japanese Patent Application Laying-Open Publication Hei 9-107362).
Herein, this type of ATM communication system in the prior art will be explained referring to FIG. 1. In this ATM communication system, valid data [1] or invalid data [0] of connections ID#0, ID#1, ID#2, . . . ID#n defined as logic paths of the cells, are set beforehand in a connection management table 10. It is assumed that the connection numbers (ID#0, . . . ID#n) and address show one-to-one in the connection management table 10. A table access management unit 11, with a trigger that a notification of expiration of a counter value is inputted from an insertion interval management counter 12 at a timing corresponding to a desired cell insertion interval (e.g., a 2-cell interval), indicates an address counter 13 periodically cycling to count up the counter value, and reads the counted-up value as a connection number.
Note that the logic path implies a category of a unit for management when distinguishing between the packets according to a plurality of classes within the packet switch system, and corresponds to a category of connection in the case of a connection-oriented system such as the ATM communication system and, in the case of a connectionless system such as the router system, to a category of a flow, link or session.
Next, the table access management unit 1, with the value read from the address counter 13 serving as an address, reads the valid/invalid state data from the connection management table 10, and, if the connection concerned is in a valid state, requests a cell inserting unit 14 to insert the cell (alarm cell).
Thus, when controlling the cell insertion interval, the cell inserting unit 14 forwards the insertion cells at intervals of 2 cells to a cell highway 15, corresponding to the valid connections. The address counter 13 is so constructed as to make one cycle at an interval of 1 sec, and hence an interval at which the cell is inserted into the same valid connection is 1 sec. This time interval of the cell insertion is based on the above ITU-T Recommendations.
As a result, the insertion interval of the cells generated per connection is kept over a predetermined interval. Note that if the cell insertion interval is not controlled, the insertion cells are forwarded in burst to the cell highway 15, corresponding to the valid connections.
Further, there exist other types of ATM communication systems each adopting a method of inserting the cell at a given rate by a cell shaping (band regulation) scheme. In this ATM communication system is provided with an insertion interval monitoring counter per connection, and the cell is inserted into the connection of which the insertion interval monitoring counter comes to its expiration.
FIG. 2 shows one example of an architecture of the conventional ATM communication system as a whole. This ATM communication system is constructed of a plurality of input line interfaces 20, a switch unit 21, a plurality of output line interfaces 22 and a system management unit 23. An alarm cell of the fixed-length packet, which is inserted from the cell inserting unit 24 of the input line interface 20, is switched to a preset route by the switch unit 21, and forwarded to an output-side cell highway 27 via the output line interface 22.
Further, the cell inserting unit 24 of each input line interface 20 or a cell inserting unit 25 of each output line interface 22 inserts a new cell, or temporarily stores (buffering) the cells arrived from the cell highway 26 or 27 and inserts the cell at a desired timing. On this occasion, the system management unit 23 sets a serial number of the connection into which the cell should be inserted and insertion timing data for each cell inserting unit 24 or 25.
Each of the cell inserting units 24, 25 includes a connection management table 10, a table access management unit 11, an insertion interval management counter 12, an address counter 13 and a cell inserting unit 14, which constitutes the ATM communication system shown in FIG. 1.
In this ATM communication system, when inserting the cells, the cell insertion interval and the timing are controlled so that the insertions are not consecutive, i.e., not burst. With this contrivance, it is possible to reduce a buffer capacity of a rear-stage buffer (e.g., when the cell inserting unit 24 of the input line interface 20 inserts the cell, it is a buffer 28 of the switch unit 21, and, when inserting the cell from the output line interface 25, it is a switch unit of a next-stage node (unillustrated)).
Based on the system architecture in the prior art, however, the insertion interval management counter for managing the cell insertion interval and the address counter for managing the connections, are individually provided, and therefore, if the number of connections and the insertion interval change per communication system, there is a necessity of previously providing counters corresponding to the number of connections and to the maximum insertion interval as well. This conduces to a problem in which the hardware is scaled up.
Further, there are in fact a less number of connections in use than the number of connections accommodated in the communication system. A problem inherent in the conventional architecture is that the cell insertion interval per connection is managed merely by controlling the insertion interval management counter, and hence the cell insertion interval is fixed in spite of the small number of connections in use.
Moreover, if the shaping control of inserting the cell at a fixed rate is adopted, a counter for monitoring the insertion interval is required per connection, and in addition there is needed conflict control (scheduling) when expiration timings of the counters conflict with each other for the plurality of connections, an increase in quantity of the hardware is therefore inevitable.
Accordingly, it is a primary object of the present invention to provide a packet insertion interval control system and a packet insertion interval control method that are capable of flexibly corresponding to changes in the number of connections (the number of channels) per communication system and in cell insertion interval (packet insertion interval) by restraining an increase in quantity of hardware.
It is another object of the present invention to provide a packet insertion interval control system and a packet insertion interval control method that are capable of controlling a cell (packet) insertion interval during an operation in accordance with the number of connections (the number of channels) in use.
It is a further object of the present invention to provide a packet insertion interval control system and a packet insertion interval control method that are capable of actualizing control of a rate of cells (packet) to be inserted with a less quantity of hardware by utilizing a regularity of an inverted value of LSB (Least Significant Bit) and MSB (Most Significant Bit) of a cyclic counter.
To accomplish the above objects, a first packet insertion interval control system according to the present invention comprises a counting unit, having a first bit field for managing an insertion interval of a management packet required to be cyclically inserted and a second bit field for specifying a logic path for forwarding the management packet, for executing such a counting operation as to periodically cycle the first bit field and the second bit field, and a control unit for executing control for specifying, when a count value indicated by the first bit field of the counting unit is a predetermined value, the logic path for forwarding the management packet on the basis of a count value indicated by the second bit field of the counting unit, and for inserting the management packet into the specified logic path.
In this architecture, the packet insertion interval control system may further comprise a state-of-transmission-path management module for storing valid/invalid state data about each of the logic paths. The control unit may specify the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the count value indicated by the second bit field of the counting unit.
A second packet insertion interval control system according to the present invention comprises a counting unit, having a first bit field for managing an insertion interval of a management packet required to be cyclically inserted and a second bit field for specifying a logic path for forwarding the management packet, for executing such a counting operation as to periodically cycle the first bit field and the second bit field, an inverting unit for obtaining an inverted value of LSB and MSB of the count value indicated by the second bit field of the counting unit, and a control unit for executing control for specifying, when a count value indicated by the first bit field of the counting unit is a predetermined value, the logic path for forwarding the management packet on the basis of the inverted value obtained by the inverting unit, and for inserting the management packet into the specified logic path.
In this architecture, the packet insertion interval control system may further comprise a state-of-transmission-path management module for storing valid/invalid state data about each of the logic paths. The control unit may specify the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the inverted value obtained by the inverting unit.
A third packet insertion interval control system according to the present invention comprises a counting unit, having bit fields corresponding to the number of bits necessary for managing an insertion interval of a management packet required to be cyclically inserted and for specifying a logic path for forwarding the management packet, for executing such a counting operation as to periodically cycle the bit fields, an inverting unit for obtaining an inverted value of LSB and MSB of the count value indicated by the bit field of the counting unit, and a control unit for executing control for specifying, when the inverted value obtained by the inverting unit is equal to or smaller than a maximum value of the number of the logic paths, the logic path for forwarding the management packet on the basis of the inverted value, and for inserting the management packet into the specified logic path.
In this architecture, the packet insertion interval control system may further comprise a state-of-transmission-path management module for storing valid/invalid state data about each of the logic paths. The control unit may specify, when the inverted value obtained by the inverting unit is equal to or smaller than a maximum value of the number of the logic paths, the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the inverted value obtained by the inverting unit.
A fourth packet insertion interval control system according to the present invention may further comprise a transmission path setting management unit for managing an allocation of a serial number of the logic path to be used in order of the smaller or larger number and for, when registered or deleted in or from the state-of-transmission-path state management module, setting valid/invalid state data, with the inverted value obtained by inverting LSB and MSB of the logic path number serving as an address. The control unit may specify the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the count value indicated by the second bit field of the counting unit.
A fifth packet insertion interval control system according to the present invention comprises a counting unit, having bit fields corresponding to a plurality of bits, for executing such a counting operation as to periodically cycle the bit fields, an inverting unit for obtaining an inverted value acquired by inverting LSB and MSB of a count value indicated by the bit field of the counting unit, and a control unit for executing control for specifying a logic path for forwarding a packet on the basis of the inverted value if the inverted value obtained by the inverting unit falls within a range of a predetermined threshold value as an insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, and for inserting into the logic path the packets accumulated beforehand in an accumulating unit.
A sixth packet insertion interval control system according to the present invention, a plurality of ranges of the predetermined threshold values are set, and the control unit executes, if the inverted value falls within any one of these ranges of the predetermined threshold values, the control for specifying the logic path for forwarding the packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
The fifth or sixth packet insertion interval control system may further comprise a state-of-transmission-path management module for storing packet existing/non-existing state data of the packets in the accumulating unit, corresponding to the logic paths. The control unit may execute the control for specifying, when the inverted value obtained by the inverting unit falls within the range of the predetermined threshold value as the insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, the logic path for forwarding the management packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
A seventh packet insertion interval control system according to the present invention comprises a counting unit constructed of an aggregation of counting elements each cycling with each of prime factors having, when a cyclic period is not a power of 2, the number of digits expressed by a power of a value obtained by prime-factorizing a cyclic count value, and a control unit for executing control for specifying, if an inverted value obtained by inverting a high-order digit and a low-order digit of the count value of the counting unit falls within a range of a predetermined threshold value as an insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, a logic path for forwarding the packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in an accumulating unit.
In this architecture, a plurality of ranges of the predetermined threshold values may be set, and the control unit may execute, if the inverted value falls within any one of these ranges of the predetermined threshold values, the control for specifying the logic path for forwarding the packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
The packet insertion interval control system may further comprise a state-of-transmission-path management module for storing packet existing/non-existing state data of the packets in the accumulating unit, corresponding to the logic paths. The control unit may execute the control for specifying, when the inverted value obtained by the inverting unit falls within the range of the predetermined threshold value as the insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, the logic path for forwarding the management packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
An eighth packet insertion interval control system according to the present invention, in the construction of the first or second or third or fourth packet insertion interval control system, may further comprise a storage module for storing in-use/unused state data about each of the logic paths, corresponding to the logic path number, and a transmission path setting management unit for managing registration and deletion of the logic path number according to each of a plurality of divided groups in the storage module, and, with the smallest or largest number being always used as a new registration number, setting the serial number of the logic path for forwarding the management packet in the state-of-transmission-path management module.
A ninth packet insertion interval control system according to the present invention, in the construction of the first or second or third or fourth packet insertion interval control system, may further comprise a storage module for storing in-use/unused state data about each of the logic paths, the serial numbers of the logic paths being arranged in tree according to digits when the serial numbers of the logic paths are expressed in a binary or other n-nary notation, and a transmission path setting management unit for managing registration and deletion of the logic path number by the storage module, and, with the smallest or largest number being always used as a new registration number, setting the serial number of the logic path for forwarding the management packet in the state-of-transmission-path management module.
A first packet insertion interval control method according to the present invention comprises a step of executing such a counting operation as to periodically cycle a first bit field for managing an insertion interval of a management packet required to be cyclically inserted and a second bit field for specifying a logic path for forwarding the management packet, and a step of specifying, when a count value indicated by the first bit field is a predetermined value, the logic path for forwarding the management packet on the basis of a count value indicated by the second bit field, and executing control for inserting the management packet into the specified logic path.
In this architecture, the second packet insertion interval control method may further comprise a step of storing valid/invalid state data about each of the logic paths in a state-of-transmission-path management module, and a step of specifying the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the count value indicated by the second bit field.
A second packet insertion interval control method comprises a step of executing such a counting operation as to periodically cycle a first bit field for managing an insertion interval of a management packet required to be cyclically inserted and a second bit field for specifying a logic path for forwarding the management packet, a step of obtaining an inverted value of LSB and MSB of the count value indicated by the second bit, and a step of executing control for specifying, when a count value indicated by the first bit field is a predetermined value, the logic path for forwarding the management packet on the basis of the inverted value obtained, and for inserting the management packet into the specified logic path.
In this architecture, the packet insertion interval control method may further comprise a step of storing valid/invalid state data about each of the logic paths a state-of-transmission-path management module, and a step of specifying the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the inverted value obtained. Here, the number of the logic paths is allocated in order to the smaller or larger number so that the valid/invalid state data may become continuous.
A third packet insertion interval control method comprises a step of executing such a counting operation as to periodically cycle bit fields corresponding to the number of bits necessary for managing an insertion interval of a management packet required to be cyclically inserted and for specifying a logic path for forwarding the management packet, a step of obtaining an inverted value of LSB and MSB of the count value indicated by the bit field, and a step of executing control for specifying, when the inverted value obtained is equal to or smaller than a maximum value of the number of the logic paths, the logic path for forwarding the management packet on the basis of the inverted value, and for inserting the management packet into the specified logic path.
In this architecture, the packet insertion interval control method may further comprise a step of storing valid/invalid state data about each of the logic paths in a state-of-transmission-path management module, and a step of specifying, when the inverted value is equal to or smaller than a maximum value of the number of the logic paths, the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the inverted value. Here, the number of the logic paths is allocated in order to the smaller or larger number so that the valid/invalid state data may become continuous.
A fourth packet insertion interval control method, in the architecture of the first packet insertion interval control method, may further comprise a step of managing an allocation of a serial number of the logic path to be used in order of the smaller or larger number and of, when registered or deleted in or from the state-of-transmission-path state management module, setting valid/invalid state data, with the inverted value obtained by inverting LSB and MSB of the logic path number serving as an address, and a step of specifying the logic path for forwarding the management packet with reference to the valid state data of the state-of-transmission-path management module, which corresponds to the count value indicated by the second bit field of the counting unit.
A fifth packet insertion interval control method comprises a step of executing such a counting operation as to periodically cycle bit fields corresponding to a plurality of bits, a step of obtaining an inverted value acquired by inverting LSB and MSB of a count value indicated by the bit field, and a step of executing control for specifying a logic path for forwarding a packet on the basis of the inverted value if the inverted value obtained falls within a range of a predetermined threshold value as an insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, and for inserting into the logic path the packets accumulated beforehand in an accumulating unit.
A sixth packet insertion interval control method, in the above architecture, may further comprise a step of setting a plurality of ranges of the predetermined threshold values, and executing, if the inverted value falls within any one of these ranges of the predetermined threshold values, the control for specifying the logic path for forwarding the packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
A packet insertion interval control method, in the architecture of the fifth or sixth packet insertion interval control method, may further comprise a step of storing packet existing/non-existing state data of the packets in the accumulating unit in a state-of-transmission-path management module, corresponding to the logic paths, and a step of executing the control for specifying, when the inverted value obtained falls within the range of the predetermined threshold value as the insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, the logic path for forwarding the management packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
A seventh packet insertion interval control method comprises a step of configuring an aggregation of counting elements each cycling with each of prime factors having, when a cyclic period is not a power of 2, the number of digits expressed by a power of a value obtained by prime-factorizing a cyclic count value, and a step of executing control for specifying, if an inverted value obtained by inverting a high-order digit and a low-order digit of the count value of the aggregation of counting elements falls within a range of a predetermined threshold value as an insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, a logic path for forwarding the packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in an accumulating unit.
In this architecture, the packet insertion interval control method may further comprise a step of setting a plurality of ranges of the predetermined threshold values, and executing, if the inverted value falls within any one of these ranges of the predetermined threshold values, the control for specifying the logic path for forwarding the packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
An eighth packet insertion interval control method, in the architecture of the first or second or third or fourth packet insertion interval control method, may further comprise a step of storing packet existing/non-existing state data of the packets in the accumulating unit in a state-of-transmission-path management module, corresponding to the logic paths, and a step of executing the control for specifying, when the inverted value obtained falls within the range of the predetermined threshold value as the insertion interval allocation oriented sequence value for managing an insertion interval of the packets required to be periodically inserted, the logic path for forwarding the management packet on the basis of the inverted value, and for inserting into the specified logic path the packets accumulated beforehand in the accumulating unit.
A ninth packet insertion interval control method, in the architecture of the first or second or third or fourth packet insertion interval control method, may further comprise a step of storing in-use/unused state data about each of the logic paths in a storage module, corresponding to the logic path number, and a step of managing registration and deletion of the logic path number according to each of a plurality of divided groups in the storage module, and, with the smallest or largest number being always used as a new registration number, setting the serial number of the logic path for forwarding the management packet in the state-of-transmission-path management module.
According to the present invention, it is feasible to flexibly correspond to changes in the number of connections (the number of channels) per communication system and in cell insertion interval (packet insertion interval) by restraining an increase in quantity of hardware. As a result, a traffic of the management packets to be inserted can be smoothed, and hence a necessary buffer capacity in a packet multiplexer provided at a rear stage can be decreased.
Further, according to the present invention, it is possible to control the cell (packet) insertion interval during an operation in accordance with the number of connections (the number of channels) in use. As a consequence, the traffic of the management packets to be inserted can be more effectively smoothed.
Moreover, according to the present invention, it is feasible to actualize control of a rate of cells (packet) to be inserted with a less quantity of hardware by utilizing a regularity of an inverted value of LSB (Least Significant Bit) and MSB (Most Significant Bit) of a cyclic counter.